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VLSI architecture of the soft-output sphere decoder for MIMO systems

Guo, Zhan LU and Nilsson, Peter LU (2005) 48th IEEE International Midwest Symposium on Circuits and Systems MWSCAS In 48th Midwest Symposium on Circuits and Systems, 2005. 2. p.1195-1198
Abstract
Sphere decoders can approach the performance of maximum-likelihood (ML) decoders for MIMO systems with lower complexity. In this paper, VLSI architecture of the modified K-best Schnorr-Euchner (MKSE) sphere decoder is proposed for soft-output MIMO decoding. The MKSE decoder can achieve near-ML performance with higher decoding throughput and lower computational complexity. The proposed VLSI architecture is implemented for a 4 /spl times/ 4 16-QAM MIMO system in a 0.13-/spl mu/m CMOS technology. The implemented soft-output MKSE chip can achieve a decoding throughput of more than 100 Mb/s with a 0.56 mm/sup 2/ core area and 97 K gates.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
quadrature amplitude modulation, maximum likelihood decoding, MIMO systems, VLSI
in
48th Midwest Symposium on Circuits and Systems, 2005.
volume
2
pages
1195 - 1198
conference name
48th IEEE International Midwest Symposium on Circuits and Systems MWSCAS
external identifiers
  • scopus:33847164976
ISBN
0-7803-9197-7
DOI
10.1109/MWSCAS.2005.1594321
language
English
LU publication?
yes
id
2251653f-81c7-4c6c-ab09-11432e8caa65 (old id 602889)
date added to LUP
2007-12-06 15:39:35
date last changed
2017-03-05 04:29:56
@inproceedings{2251653f-81c7-4c6c-ab09-11432e8caa65,
  abstract     = {Sphere decoders can approach the performance of maximum-likelihood (ML) decoders for MIMO systems with lower complexity. In this paper, VLSI architecture of the modified K-best Schnorr-Euchner (MKSE) sphere decoder is proposed for soft-output MIMO decoding. The MKSE decoder can achieve near-ML performance with higher decoding throughput and lower computational complexity. The proposed VLSI architecture is implemented for a 4 /spl times/ 4 16-QAM MIMO system in a 0.13-/spl mu/m CMOS technology. The implemented soft-output MKSE chip can achieve a decoding throughput of more than 100 Mb/s with a 0.56 mm/sup 2/ core area and 97 K gates.},
  author       = {Guo, Zhan and Nilsson, Peter},
  booktitle    = {48th Midwest Symposium on Circuits and Systems, 2005.},
  isbn         = {0-7803-9197-7},
  keyword      = {quadrature amplitude modulation,maximum likelihood decoding,MIMO systems,VLSI},
  language     = {eng},
  pages        = {1195--1198},
  title        = {VLSI architecture of the soft-output sphere decoder for MIMO systems},
  url          = {http://dx.doi.org/10.1109/MWSCAS.2005.1594321},
  volume       = {2},
  year         = {2005},
}