A CMOS 500 MS/S charge sampler
(2004) IASTED International Conference on Circuits, Signals, and Systems, 2004 p.462-466- Abstract
- A new sample-and-hold circuit based on the charge sampling technique is introduced, which integrates input current instead of tracking input voltage to realize high speed and low voltage sampling. Both the theoretical analysis and the experimental results prove that it can realize both sample-and-hold and amplification functions. A 500 MS/s charge sampling circuit is implemented in 0.25 μm CMOS process and measured. The dynamic range reaches 42 dB within the 250 MHz bandwidth. The power consumption is about 5 mW.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/614956
- author
- Xu, Gang LU and Yuan, Jiren LU
- organization
- publishing date
- 2004
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Power consumption, Current mode sampling, Charge sampling, Charge sampler
- host publication
- Proceedings of the IASTED International Conference on Circuits, Signals, and Systems
- pages
- 462 - 466
- publisher
- ACTA Press
- conference name
- IASTED International Conference on Circuits, Signals, and Systems, 2004
- conference location
- Clearwater Beach, FL, United States
- conference dates
- 2004-11-28 - 2004-12-01
- external identifiers
-
- scopus:11144279458
- ISBN
- 0889864551
- language
- English
- LU publication?
- yes
- id
- 77d73104-9190-4f35-91de-b86f6ba14e5f (old id 614956)
- date added to LUP
- 2016-04-04 11:48:42
- date last changed
- 2022-01-29 22:31:03
@inproceedings{77d73104-9190-4f35-91de-b86f6ba14e5f, abstract = {{A new sample-and-hold circuit based on the charge sampling technique is introduced, which integrates input current instead of tracking input voltage to realize high speed and low voltage sampling. Both the theoretical analysis and the experimental results prove that it can realize both sample-and-hold and amplification functions. A 500 MS/s charge sampling circuit is implemented in 0.25 μm CMOS process and measured. The dynamic range reaches 42 dB within the 250 MHz bandwidth. The power consumption is about 5 mW.}}, author = {{Xu, Gang and Yuan, Jiren}}, booktitle = {{Proceedings of the IASTED International Conference on Circuits, Signals, and Systems}}, isbn = {{0889864551}}, keywords = {{Power consumption; Current mode sampling; Charge sampling; Charge sampler}}, language = {{eng}}, pages = {{462--466}}, publisher = {{ACTA Press}}, title = {{A CMOS 500 MS/S charge sampler}}, year = {{2004}}, }