A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
(2014) In Analog Integrated Circuits and Signal Processing 80(3). p.387-397- Abstract
- We present a 2nd-order 4-bit continuous-time (CT) delta-sigma modulator (DSM) employing a 2nd-order loop filter with a single operational amplifier. This choice strongly reduces the power consumption, since operational amplifiers are the most power hungry blocks in the DSM. The DSM has been implemented in a 65 nm CMOS process, where it occupies an area of . It achieves an SNDR of 64 dB over a 500 kHz signal bandwidth with an oversampling ratio of 16. The power consumption is from a 800 mV power supply. The DSM figure-of-merit is 59 fJ/conversion. The CT DSM is well suited for the receiver of an ultra-low-power radio.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/4706649
- author
- Radjen, Dejan LU ; Anderson, Martin ; Sundstrom, Lars and Andreani, Pietro LU
- organization
- publishing date
- 2014
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Delta-Sigma, Single-operational-amplifier, Low-power, Continuous time, RC loop filter
- in
- Analog Integrated Circuits and Signal Processing
- volume
- 80
- issue
- 3
- pages
- 387 - 397
- publisher
- Springer
- external identifiers
-
- wos:000342079400007
- scopus:84906948692
- ISSN
- 0925-1030
- DOI
- 10.1007/s10470-014-0335-8
- language
- English
- LU publication?
- yes
- id
- 78300094-43d1-4ce1-b235-e91d1f970831 (old id 4706649)
- date added to LUP
- 2016-04-01 15:01:34
- date last changed
- 2022-03-22 03:09:01
@article{78300094-43d1-4ce1-b235-e91d1f970831, abstract = {{We present a 2nd-order 4-bit continuous-time (CT) delta-sigma modulator (DSM) employing a 2nd-order loop filter with a single operational amplifier. This choice strongly reduces the power consumption, since operational amplifiers are the most power hungry blocks in the DSM. The DSM has been implemented in a 65 nm CMOS process, where it occupies an area of . It achieves an SNDR of 64 dB over a 500 kHz signal bandwidth with an oversampling ratio of 16. The power consumption is from a 800 mV power supply. The DSM figure-of-merit is 59 fJ/conversion. The CT DSM is well suited for the receiver of an ultra-low-power radio.}}, author = {{Radjen, Dejan and Anderson, Martin and Sundstrom, Lars and Andreani, Pietro}}, issn = {{0925-1030}}, keywords = {{Delta-Sigma; Single-operational-amplifier; Low-power; Continuous time; RC loop filter}}, language = {{eng}}, number = {{3}}, pages = {{387--397}}, publisher = {{Springer}}, series = {{Analog Integrated Circuits and Signal Processing}}, title = {{A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier}}, url = {{http://dx.doi.org/10.1007/s10470-014-0335-8}}, doi = {{10.1007/s10470-014-0335-8}}, volume = {{80}}, year = {{2014}}, }