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A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping

Lu, Ping LU and Andreani, Pietro LU (2014) IEEE International Symposium on Circuits and Systems (ISCAS), 2014 p.1324-1327
Abstract
We use a 2-dimensional (2-D) Vernier gated-ring-oscillator (GRO) time-to-digital-converter (TDC) in a cascade structure (MASH), so that a larger raw quantization step can be allowed without sacrificing the final resolution performance. The 2-D approach effectively reduces the latency time under a large input, while the MASH structure provides a 2nd-order noise shaping that produces a lower in-band quantization noise than in a single-stage GRO TDC. The TDC is simulated in a 65nm CMOS process. With the oversampling ratio (OSR) of 20, an equivalent TDC resolution of 2.48ps is achieved under the raw (Vernier) resolution of 56ps. The latency is less than 1/10 of a Vernier TDC’s for a 3ns input signal.
Please use this url to cite or link to this publication:
author
and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
GRO, Vernier, TDC, 2-D, MASH
host publication
[Host publication title missing]
pages
4 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 2014
conference location
Melbourne, Australia
conference dates
2014-06-01 - 2014-06-05
external identifiers
  • wos:000346488600335
  • scopus:84907407780
ISSN
0271-4310
2158-1525
ISBN
978-1-4799-3431-7
DOI
10.1109/ISCAS.2014.6865387
language
English
LU publication?
yes
id
7ab06e92-946f-46bb-8080-8b66869c1f54 (old id 4275887)
alternative location
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6865387
date added to LUP
2016-04-01 10:21:43
date last changed
2025-10-14 10:04:54
@inproceedings{7ab06e92-946f-46bb-8080-8b66869c1f54,
  abstract     = {{We use a 2-dimensional (2-D) Vernier gated-ring-oscillator (GRO) time-to-digital-converter (TDC) in a cascade structure (MASH), so that a larger raw quantization step can be allowed without sacrificing the final resolution performance. The 2-D approach effectively reduces the latency time under a large input, while the MASH structure provides a 2nd-order noise shaping that produces a lower in-band quantization noise than in a single-stage GRO TDC. The TDC is simulated in a 65nm CMOS process. With the oversampling ratio (OSR) of 20, an equivalent TDC resolution of 2.48ps is achieved under the raw (Vernier) resolution of 56ps. The latency is less than 1/10 of a Vernier TDC’s for a 3ns input signal.}},
  author       = {{Lu, Ping and Andreani, Pietro}},
  booktitle    = {{[Host publication title missing]}},
  isbn         = {{978-1-4799-3431-7}},
  issn         = {{0271-4310}},
  keywords     = {{GRO; Vernier; TDC; 2-D; MASH}},
  language     = {{eng}},
  pages        = {{1324--1327}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping}},
  url          = {{http://dx.doi.org/10.1109/ISCAS.2014.6865387}},
  doi          = {{10.1109/ISCAS.2014.6865387}},
  year         = {{2014}},
}