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Teaching digital HW-design by implementing a complete MP3 decoder

Hedberg, Hugo LU ; Lenart, Thomas LU ; Svensson, Henrik LU ; Nilsson, Peter LU and Öwall, Viktor LU (2003) IEEE International Conference on Microelectronic Systems Education (MSE), 2003 p.31-32
Abstract
This paper describes a project course that focuses on all the different stages in an ASIC design flow. The project starts at algorithm level, followed by architecture selection, netlist generation, down to physical layout, fabrication, and finally verification. The scope of the project, implementing a complete MP3 decoder in VHDL and sending it for fabrication, motivates the students to work hard towards a common goal
Please use this url to cite or link to this publication:
author
; ; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
VHSIC HDL, VHDL, very high speed integrated circuits, hardware description languages, educational courses, MP3 decoder, netlist generation, integrated circuit verification, integrated circuit fabrication, application specific integrated circuits, integrated circuits architecture selection, digital HW-design, teaching, project course, hardware design, ASIC design
host publication
[Host publication title missing]
pages
31 - 32
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE International Conference on Microelectronic Systems Education (MSE), 2003
conference location
Anaheim, CA, United States
conference dates
2003-06-01 - 2003-06-02
external identifiers
  • wos:000183433900014
  • scopus:84906775440
ISBN
0-7695-1973-3
DOI
10.1109/MSE.2003.1205241
language
English
LU publication?
yes
id
81db5170-cdba-4470-b5aa-87f20ff34df0 (old id 613196)
date added to LUP
2016-04-04 12:03:10
date last changed
2022-01-29 22:52:35
@inproceedings{81db5170-cdba-4470-b5aa-87f20ff34df0,
  abstract     = {{This paper describes a project course that focuses on all the different stages in an ASIC design flow. The project starts at algorithm level, followed by architecture selection, netlist generation, down to physical layout, fabrication, and finally verification. The scope of the project, implementing a complete MP3 decoder in VHDL and sending it for fabrication, motivates the students to work hard towards a common goal}},
  author       = {{Hedberg, Hugo and Lenart, Thomas and Svensson, Henrik and Nilsson, Peter and Öwall, Viktor}},
  booktitle    = {{[Host publication title missing]}},
  isbn         = {{0-7695-1973-3}},
  keywords     = {{VHSIC HDL; VHDL; very high speed integrated circuits; hardware description languages; educational courses; MP3 decoder; netlist generation; integrated circuit verification; integrated circuit fabrication; application specific integrated circuits; integrated circuits architecture selection; digital HW-design; teaching; project course; hardware design; ASIC design}},
  language     = {{eng}},
  pages        = {{31--32}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Teaching digital HW-design by implementing a complete MP3 decoder}},
  url          = {{http://dx.doi.org/10.1109/MSE.2003.1205241}},
  doi          = {{10.1109/MSE.2003.1205241}},
  year         = {{2003}},
}