Masked Depth Culling for Graphics Hardware
(2015) SIGGRAPH Asia In ACM Transactions on Graphics (TOG) 34(6).- Abstract
- Hierarchical depth culling is an important optimization, which is present in all modern high performance graphics processors. We present a novel culling algorithm based on a layered depth representation, with a per-sample mask indicating which layer each sample belongs to. Our algorithm is feed forward in nature in contrast to previous work, which rely on a delayed feedback loop. It is simple to implement and has fewer constraints than competing algorithms, which makes it easier to load-balance a hardware architecture. Compared to previous work our algorithm performs very well, and it will often reach over 90% of the efficiency of an optimal culling oracle. Furthermore, we can reduce bandwidth by up to 16% by compressing the hierarchical... (More)
- Hierarchical depth culling is an important optimization, which is present in all modern high performance graphics processors. We present a novel culling algorithm based on a layered depth representation, with a per-sample mask indicating which layer each sample belongs to. Our algorithm is feed forward in nature in contrast to previous work, which rely on a delayed feedback loop. It is simple to implement and has fewer constraints than competing algorithms, which makes it easier to load-balance a hardware architecture. Compared to previous work our algorithm performs very well, and it will often reach over 90% of the efficiency of an optimal culling oracle. Furthermore, we can reduce bandwidth by up to 16% by compressing the hierarchical depth buffer. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/7874493
- author
- Andersson, Magnus LU ; Hasselgren, Jon and Akenine-Möller, Tomas LU
- organization
- publishing date
- 2015
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- Proceedings of ACM SIGGRAPH Asia 2015
- series title
- ACM Transactions on Graphics (TOG)
- volume
- 34
- issue
- 6
- article number
- 188
- publisher
- Association for Computing Machinery (ACM)
- conference name
- SIGGRAPH Asia
- conference location
- Kobe, Japan
- conference dates
- 2015-11-02
- external identifiers
-
- wos:000363671200025
- scopus:84995740167
- ISSN
- 0730-0301
- DOI
- 10.1145/2816795.2818138
- language
- English
- LU publication?
- yes
- id
- a06ed63b-b7d1-4122-beac-24e188b0f039 (old id 7874493)
- date added to LUP
- 2016-04-01 12:52:36
- date last changed
- 2022-04-29 17:00:42
@inproceedings{a06ed63b-b7d1-4122-beac-24e188b0f039, abstract = {{Hierarchical depth culling is an important optimization, which is present in all modern high performance graphics processors. We present a novel culling algorithm based on a layered depth representation, with a per-sample mask indicating which layer each sample belongs to. Our algorithm is feed forward in nature in contrast to previous work, which rely on a delayed feedback loop. It is simple to implement and has fewer constraints than competing algorithms, which makes it easier to load-balance a hardware architecture. Compared to previous work our algorithm performs very well, and it will often reach over 90% of the efficiency of an optimal culling oracle. Furthermore, we can reduce bandwidth by up to 16% by compressing the hierarchical depth buffer.}}, author = {{Andersson, Magnus and Hasselgren, Jon and Akenine-Möller, Tomas}}, booktitle = {{Proceedings of ACM SIGGRAPH Asia 2015}}, issn = {{0730-0301}}, language = {{eng}}, number = {{6}}, publisher = {{Association for Computing Machinery (ACM)}}, series = {{ACM Transactions on Graphics (TOG)}}, title = {{Masked Depth Culling for Graphics Hardware}}, url = {{http://dx.doi.org/10.1145/2816795.2818138}}, doi = {{10.1145/2816795.2818138}}, volume = {{34}}, year = {{2015}}, }