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Ultra-Scaled AlOx Diffusion Barriers for Multibit HfOx RRAM Operation

Persson, Karl-Magnus LU ; Mamidala, Saketh, Ram LU orcid and Wernersson, Lars-Erik LU (2021) In IEEE Journal of the Electron Devices Society 9. p.564-569
Abstract
For dense very large scale integration (VLSI) of high performance, multibit resistive memory (RRAM), scalability of material dimensions, as well as the operational sensitivity of the RRAM to voltage fluctuations, have to be considered. This report presents the benefits of adding 0.5-nm thick AlO x diffusion barriers at the different electrode interfaces of HfO x . It is found that implementing AlO x -layers at both the bottom and the top electrode interface enables a tight control of the oxygen vacancy filament, resulting in low switching voltages and significantly improving switching endurance up to 10 6 cycles using a performance limiting resistor compliance. It is also shown that the filament in its low resistive state ( RLRS ) can be... (More)
For dense very large scale integration (VLSI) of high performance, multibit resistive memory (RRAM), scalability of material dimensions, as well as the operational sensitivity of the RRAM to voltage fluctuations, have to be considered. This report presents the benefits of adding 0.5-nm thick AlO x diffusion barriers at the different electrode interfaces of HfO x . It is found that implementing AlO x -layers at both the bottom and the top electrode interface enables a tight control of the oxygen vacancy filament, resulting in low switching voltages and significantly improving switching endurance up to 10 6 cycles using a performance limiting resistor compliance. It is also shown that the filament in its low resistive state ( RLRS ) can be linearly reduced and enlarged at levels compatible to the conduction limitations of scaled selectors using an external 1T1R transistor compliance. With selector controlled resistance modulation, the RLRS becomes independent of the magnitude of the programming voltage and thus less sensitive to losses throughout a large memory array. (Less)
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type
Contribution to journal
publication status
published
subject
in
IEEE Journal of the Electron Devices Society
volume
9
pages
6 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85105870399
ISSN
2168-6734
DOI
10.1109/JEDS.2021.3079398
language
English
LU publication?
yes
id
c98d24b5-b76f-4666-900d-f5e3ed2e7998
date added to LUP
2021-05-25 14:02:06
date last changed
2022-04-27 02:03:29
@article{c98d24b5-b76f-4666-900d-f5e3ed2e7998,
  abstract     = {{For dense very large scale integration (VLSI) of high performance, multibit resistive memory (RRAM), scalability of material dimensions, as well as the operational sensitivity of the RRAM to voltage fluctuations, have to be considered. This report presents the benefits of adding 0.5-nm thick AlO x diffusion barriers at the different electrode interfaces of HfO x . It is found that implementing AlO x -layers at both the bottom and the top electrode interface enables a tight control of the oxygen vacancy filament, resulting in low switching voltages and significantly improving switching endurance up to 10 6 cycles using a performance limiting resistor compliance. It is also shown that the filament in its low resistive state ( RLRS ) can be linearly reduced and enlarged at levels compatible to the conduction limitations of scaled selectors using an external 1T1R transistor compliance. With selector controlled resistance modulation, the RLRS becomes independent of the magnitude of the programming voltage and thus less sensitive to losses throughout a large memory array.}},
  author       = {{Persson, Karl-Magnus and Mamidala, Saketh, Ram and Wernersson, Lars-Erik}},
  issn         = {{2168-6734}},
  language     = {{eng}},
  month        = {{05}},
  pages        = {{564--569}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  series       = {{IEEE Journal of the Electron Devices Society}},
  title        = {{Ultra-Scaled AlOx Diffusion Barriers for Multibit HfOx RRAM Operation}},
  url          = {{http://dx.doi.org/10.1109/JEDS.2021.3079398}},
  doi          = {{10.1109/JEDS.2021.3079398}},
  volume       = {{9}},
  year         = {{2021}},
}