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- 2004
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Mark
An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Student-oriented Examination in a Computer Architecture Course
(
- Contribution to conference › Paper, not in proceeding
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Mark
Defect-Aware SOC Test Scheduling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Efficient implementation of the time-recursive Capon and APES Spectral Estimators
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Efficient test solutions for core-based designs
2004) In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23(5). p.758-775(
- Contribution to journal › Article
-
Mark
A Technique for Optimization of System-on-Chip Test Data Transportation
(
- Contribution to conference › Paper, not in proceeding
- 2003
-
Mark
Test Resource Partitioning and Optimization for SOC Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Optimal System-on-Chip Test Scheduling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
SOC Test Time Minimization Under Multiple Constraints
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding