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- 1998
-
Mark
A low logic depth complex multiplier
- Contribution to conference › Paper, not in proceeding
-
Mark
Designing pipeline FFT processor for OFDM (de)modulation
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1997
-
Mark
Low Power Optimization of Bit-Serial Digital Filters
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Coefficient Optimization for Low Power Digital Filters
(1997) NORCHIP Conference, 1997
- Contribution to conference › Paper, not in proceeding
-
Mark
Low Power Lattice Wave Digital Bit-Serial Filters
(1997) 5th International Conference VLSI and CAD (ICVC’97)
- Contribution to conference › Paper, not in proceeding
-
Mark
A Custom Digital Intermediate Frequency Filter for the American Mobile Telephone System
- Contribution to journal › Article
-
Mark
A fast complex tree multiplier using distributed arithmetic
(1997) NORCHIP Conference, 1997
- Contribution to conference › Paper, not in proceeding
-
Mark
An algorithm for automatic control of a high speed power converter implemented on a custom DSP
(1997) European Microelectronics Application Conference (EMAC)
- Contribution to conference › Paper, not in proceeding
-
Mark
A custom DSP for feature extraction with a calculation capacity of >1 GMAC/s and low I/O bandwidth
(1997) European Microelectronics Application Conference (EMAC)
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation of Low Power Lattice Wave Digital Filters
(1997) European Microelectronics Application Conference 1997 (EMAC’97)
- Contribution to conference › Paper, not in proceeding