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- 2011
-
Mark
Test Scheduling and Test Access Optimization for Core-Based 3D Stacked ICs with Through-Silicon Vias: poster
Sengupta, Breeta LU ; Ingelsson, Urban and Larsson, Erik LU
(2011)
IEEE European Test Symposium (ETS), 2011
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2010
-
Mark
A Distributed Architecture to Check Global Properties for Post-Silicon Debug
Larsson, Erik LU
; Vermeulen, Bart
and Goossens, Kees
(2010)
IEEE European Test Symposium (ETS'10), 2010
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Optimizing Fault Tolerance for Multi-Processor System-on-Chip
Nikolov, Dimitar LU ; Väyrynen, Mikael ; Ingelsson, Urban ; Larsson, Erik LU
and Singh, Virendra
(2010)
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
Study on Combined Test-Data Compression and Test Planning for Testing of Modular SoCs
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
Efficient Embedding of Deterministic Test Data
Majeed, Mudassar ; Ahlström, Daniel ; Ingelsson, Urban ; Carlsson, Gunnar and Larsson, Erik LU
(2010)
Swedish SoC Conference 2010
- Contribution to conference › Paper, not in proceeding
-
Mark
Checking Pipelined Distributed Global Properties for Post-silicon Debug
Larsson, Erik LU
; Vermeulen, Bart
and Goossens, Kees
(2010)
IEEE Eleventh Workshop on RTL and High Level Testing, 2010
- Contribution to conference › Paper, not in proceeding
-
Mark
Test scheduling on IJTAG
Larsson, Erik LU
; Ghani Zadegan, Farrokh
LU
; Ingelsson, Urban
and Carlsson, Gunnar
(2010)
Nordic Test Forum (NTF 2010),
- Contribution to conference › Paper, not in proceeding
-
Mark
Scan Cells Reordering to Minimize Peak Power During Test Cycle : A Graph Theoretic Approach
Tudu, Jaynarayan T. ; Larsson, Erik LU
; Singh, Virendra
and Fujiwara, Hideo
(2010)
IEEE European Test Symposium (ETS'10), 2010
p.259-259
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Estimating Error-Probability and Its Application for Optimizing Roll-back Recovery with Checkpointing
Nikolov, Dimitar LU ; Ingelsson, Urban ; Singh, Virendra and Larsson, Erik LU
(2010)
5th IEEE Intl. Symposium on Electronic Design, and Applications (DELTA 2010)
p.281-285
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Scheduling Tests for Stacked 3D Chips under Power Constraints
- Contribution to conference › Paper, not in proceeding