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- 2008
-
Mark
A hardware acceleration platform for digital holographic imaging
(
- Contribution to journal › Article
-
Mark
Modelling and exploration of a reconfigurable array using SystemC TLM
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Modeling and exploration of a reconfigurable architecture for digital holographic imaging
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A hybrid interconnect network-on-chip and a transaction level modeling approach for reconfigurable computing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2007
-
Mark
Accelerating vector operations by utilizing reconfigurable coprocessor architectures
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Implementing the G.723.1 speech codec using a coarse-grained reconfigurable coprocessor
2007) International Conference on Engineering of Reconfigurable System and Algorithms (ERSA), p.195-198(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2006
-
Mark
Architectures for Dynamic Data Scaling in 2/4/8K Pipeline FFT Cores
(
- Contribution to journal › Article
- 2005
-
Mark
A Streaming Hardware Accelerator for Digital Holography
2005) Swedish System-on-Chip Conference (SSoCC'05)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
XStream - A Hardware Accelerator for Digital Holographic Imaging
2005) IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2005(
- Contribution to conference › Paper, not in proceeding
- 2004
-
Mark
A Reconfigurable System for Image Reconstruction in Digital Holography
2004) Swedish System-on-Chip Conference 2004 (SSoCC’04)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding