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- 2009
-
Mark
A PLL based 12GHz LO generator with digital phase control in 90nm CMOS
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 24-GHz Quadrature Receiver Front-end in 90-nm CMOS
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2008
-
Mark
Design of Reconfigurable Hardware Architectures for Real-time Applications
- Thesis › Doctoral thesis (compilation)
-
Mark
Gated tunnel diode pulse generator
(2008) GigaHertz Symposium In Technical report MC2 - Department of Microtechnology and Nanoscience, Chalmers University of Technology p.37-37
- Contribution to journal › Published meeting abstract
-
Mark
Optimization and implementation of a Viterbi decoder under flexibility constraints
- Contribution to journal › Article
-
Mark
An Embedded Real-Time Surveillance System: Implementation and Evaluation
- Contribution to journal › Article
-
Mark
Image Processing Architectures for Binary Morphology and Labeling
(2008) In Series of licentiate and doctoral thesis
- Thesis › Doctoral thesis (monograph)
-
Mark
Microwave CMOS Beamforming Transmitters
(2008) In Department of Electrical and Information Technology, Series of licentiate and doctoral theses 12.
- Thesis › Doctoral thesis (compilation)
-
Mark
Arithmetic reduction of adder leakage in nanoscale CMOS
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 30 GHz 90-nm CMOS Passive Subharmonic Mixer with 15 GHz Differential LO
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
