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2020
Mark Test Cost Reduction of 3D Stacked ICs : Test Planning and Test Flow Selection
Sengupta, Breeta ^LU (2020)
- Thesis › Doctoral thesis (monograph)
2017
Mark Reconfigurable On-Chip Instrument Access Networks : Analysis, Design, Operation, and Application
Ghani Zadegan, Farrokh ^LU (2017)
- Thesis › Doctoral thesis (compilation)
2014
Mark Fault Tolerance for Real-Time Systems: Analysis and Optimization of Roll-back Recovery with Checkpointing
Nikolov, Dimitar ^LU (2014)
- Thesis › Doctoral thesis (monograph)
2012
Mark Optimizing Fault Tolerance for Real-Time Systems
Nikolov, Dimitar ^LU (2012)
- Thesis › Licentiate thesis
2008
Mark Test Optimization for Core-based System-on-Chip
Larsson, Anders (2008) In Linköping studies in science and technology dissertations
- Thesis › Doctoral thesis (monograph)
2005
Mark System-on-Chip Test Scheduling and Test Infrastructure Design
Larsson, Anders (2005)
- Thesis › Licentiate thesis

your query:: Remove supervisor: Larsson, Erik (LU)