Mats Torkelson (Former)
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- 2000
-
Mark
A low logic depth complex multiplier using distributed arithmetic
(
- Contribution to journal › Article
-
Mark
A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
High bandwidth iterative decoding in a fading environment
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A custom image convolution DSP with a sustained calculation capacity of >1 GMAC/s and low I/O bandwidth
(
- Contribution to journal › Article
-
Mark
Power Reduction in Custom CMOS Digital Filter Structures
(
- Contribution to journal › Article
-
Mark
Design of a High Throughput Serial Concatenated Convolution Decoder
1999) NORCHIP Conference, 1999(
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation Issues for acoustic echo cancellers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A prestudy of an echo canceller implementation
1999) International Conference on Signal Processing Applications and Technology (ICSPAT)(
- Contribution to conference › Paper, not in proceeding
- 1998
-
Mark
A low logic depth complex multiplier
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Designing pipeline FFT processor for OFDM (de)modulation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding