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- 2008
-
Mark
Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2007
-
Mark
Optimized Integration of Test Compression and Sharing for SOC Testing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
What Impacts Course Evaluation?
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
Emerging strategies for resource-constrained testing of system chips
2005)(
- Other contribution › Miscellaneous
-
Mark
SOC Test Scheduling with Test Set Sharing and Broadcasting
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
A Technique for Optimization of System-on-Chip Test Data Transportation
(
- Contribution to conference › Paper, not in proceeding
- 2003
-
Mark
Buffer and Controller Minimization for Time-Constrained Testing of System-On-Chip
2003) 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems DFT03 p.385-392(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding