Department of Electrical and Information Technology
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- 2025
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Mark
A Plaintext-checking Oracle for Decapsulation Leakage in the NIST HQC FPGA Reference Implementation
- Master (Two yrs)
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Mark
Optimization of MoRe contacts to InGaAs Quantum Wells
- Master (Two yrs)
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Mark
Design and Implementation of an ECC controller for FTJ memristors
- Master (Two yrs)
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Mark
Human Text Query for Sport Data using LLMs
- Master (Two yrs)
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Mark
A 10-bit Linear Interpolation DAC with Tree-structured DEM for WiFi 6 Application
- Master (Two yrs)
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Mark
Chain characterisation of sub-circuits for the study of SRAM
- Master (Two yrs)
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Mark
Device Clusters
- Master (Two yrs)
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Exploring Formal in Datapath Verification
- Master (Two yrs)
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Evaluating Power Saving Strategies in the Downlink Subsystem of Radio ASICs
- Master (Two yrs)
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Mark
Enhancing Traffic Safety Through V2X-Based Deep Reinforcement Learning
- Master (Two yrs)