Skip to main content

Lund University Publications

LUND UNIVERSITY LIBRARIES

RF Characterization of Vertical Wrap-Gated InAs/High-κ Nanowire Capacitors

Wu, Jun LU ; Jansson, Kristofer LU ; Shiri Babadi, Aein LU ; Berg, Martin LU ; Lind, Erik LU and Wernersson, Lars-Erik LU (2016) In IEEE Transactions on Electron Devices 63(2). p.584-589
Abstract
This paper presents RF as well as low-frequency capacitance–voltage (C–V) characterization of vertical wrap-gated InAs/high-κ nanowire MOS capacitors. A full equivalent circuit model for traps is used to fit the low-frequency C–V characteristics, from which the interface trap density (Dit) and border trap density (Nbt) are evaluated separately. The results show comparable Nbt but far lower Dit (<10E12 eV−1cm−2 near the conduction band edge) for a nanowire MOS gate-stack compared with planar references. In the RF domain, the influence of nanowire series resistances become significant, and by introducing

a distributed RC-model, the nanowire resistivity (ρnw) is evaluated from the capacitance data as a function of the gate bias.... (More)
This paper presents RF as well as low-frequency capacitance–voltage (C–V) characterization of vertical wrap-gated InAs/high-κ nanowire MOS capacitors. A full equivalent circuit model for traps is used to fit the low-frequency C–V characteristics, from which the interface trap density (Dit) and border trap density (Nbt) are evaluated separately. The results show comparable Nbt but far lower Dit (<10E12 eV−1cm−2 near the conduction band edge) for a nanowire MOS gate-stack compared with planar references. In the RF domain, the influence of nanowire series resistances become significant, and by introducing

a distributed RC-model, the nanowire resistivity (ρnw) is evaluated from the capacitance data as a function of the gate bias. An ON/OFF ρnw ratio of 10E−2 is obtained for the best device. Using the measured data, the quality factor is finally evaluated both for fabricated and ideal capacitors. The results agree well with simulated data. (Less)
Please use this url to cite or link to this publication:
author
; ; ; ; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
trap density., RF, resistivity, quality factor, nanowire, InAs, high-κ, Capacitance–voltage (C–V)
in
IEEE Transactions on Electron Devices
volume
63
issue
2
pages
584 - 589
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:84958107906
  • wos:000369304700009
ISSN
0018-9383
DOI
10.1109/TED.2015.2506040
project
EIT_WWW Wireless with Wires
language
English
LU publication?
yes
id
09ef5ecc-6d61-4cea-9c9b-697032aea70d (old id 8864506)
date added to LUP
2016-04-01 13:51:10
date last changed
2023-11-12 22:57:19
@article{09ef5ecc-6d61-4cea-9c9b-697032aea70d,
  abstract     = {{This paper presents RF as well as low-frequency capacitance–voltage (C–V) characterization of vertical wrap-gated InAs/high-κ nanowire MOS capacitors. A full equivalent circuit model for traps is used to fit the low-frequency C–V characteristics, from which the interface trap density (Dit) and border trap density (Nbt) are evaluated separately. The results show comparable Nbt but far lower Dit (&lt;10E12 eV−1cm−2 near the conduction band edge) for a nanowire MOS gate-stack compared with planar references. In the RF domain, the influence of nanowire series resistances become significant, and by introducing<br/><br>
a distributed RC-model, the nanowire resistivity (ρnw) is evaluated from the capacitance data as a function of the gate bias. An ON/OFF ρnw ratio of 10E−2 is obtained for the best device. Using the measured data, the quality factor is finally evaluated both for fabricated and ideal capacitors. The results agree well with simulated data.}},
  author       = {{Wu, Jun and Jansson, Kristofer and Shiri Babadi, Aein and Berg, Martin and Lind, Erik and Wernersson, Lars-Erik}},
  issn         = {{0018-9383}},
  keywords     = {{trap density.; RF; resistivity; quality factor; nanowire; InAs; high-κ; Capacitance–voltage (C–V)}},
  language     = {{eng}},
  number       = {{2}},
  pages        = {{584--589}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  series       = {{IEEE Transactions on Electron Devices}},
  title        = {{RF Characterization of Vertical Wrap-Gated InAs/High-κ Nanowire Capacitors}},
  url          = {{http://dx.doi.org/10.1109/TED.2015.2506040}},
  doi          = {{10.1109/TED.2015.2506040}},
  volume       = {{63}},
  year         = {{2016}},
}