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High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates

Johansson, Sofia LU ; Memisevic, Elvedin LU ; Wernersson, Lars-Erik LU and Lind, Erik LU orcid (2014) In IEEE Electron Device Letters 35(5). p.518-520
Abstract
We demonstrate a vertical InAs nanowire MOSFET integrated on Si substrate with an extrinsic peak cut-off frequency of 103 GHz and a maximum oscillation frequency of 155 GHz. The transistor has a transconductance of 730 mS/mm and is based on arrays of nanowires with gate-all-around and high-kappa gate dielectric. Furthermore, small-signal modeling shows a similar to 80% reduction of the total parasitic gate capacitance when the metal pad overlap in the transistors is reduced through additional patterning.
Please use this url to cite or link to this publication:
author
; ; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Nanowire, III-V, MOSFET, RF, transistor, InAs
in
IEEE Electron Device Letters
volume
35
issue
5
pages
518 - 520
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000335147600006
  • scopus:84899986783
ISSN
0741-3106
DOI
10.1109/LED.2014.2310119
language
English
LU publication?
yes
id
5662097c-52ea-4c0a-b561-34958efd55e1 (old id 4482417)
date added to LUP
2016-04-01 13:11:22
date last changed
2024-04-24 04:44:02
@article{5662097c-52ea-4c0a-b561-34958efd55e1,
  abstract     = {{We demonstrate a vertical InAs nanowire MOSFET integrated on Si substrate with an extrinsic peak cut-off frequency of 103 GHz and a maximum oscillation frequency of 155 GHz. The transistor has a transconductance of 730 mS/mm and is based on arrays of nanowires with gate-all-around and high-kappa gate dielectric. Furthermore, small-signal modeling shows a similar to 80% reduction of the total parasitic gate capacitance when the metal pad overlap in the transistors is reduced through additional patterning.}},
  author       = {{Johansson, Sofia and Memisevic, Elvedin and Wernersson, Lars-Erik and Lind, Erik}},
  issn         = {{0741-3106}},
  keywords     = {{Nanowire; III-V; MOSFET; RF; transistor; InAs}},
  language     = {{eng}},
  number       = {{5}},
  pages        = {{518--520}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  series       = {{IEEE Electron Device Letters}},
  title        = {{High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates}},
  url          = {{http://dx.doi.org/10.1109/LED.2014.2310119}},
  doi          = {{10.1109/LED.2014.2310119}},
  volume       = {{35}},
  year         = {{2014}},
}