III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications
(2020) In Semiconductor Science and Technology 35(6).- Abstract
We present a semi self-aligned processing scheme for III-V nanowire transistors with novel semiconductor spacers in the shape of Λ-ridges, utilising the effect of slow growth rate on {111}B facets. The addition of spacers relaxes the constraint on the perfect alignment of gate to contact areas to enable low overlap capacitances. The spacers give a field-plate effect that also helps reduce off-state and output conductance while increasing breakdown voltage. Microwave compatible devices with L g = 32 nm showing f T = 75 GHz and f max = 100 GHz are realized with the process, demonstrating matched performance to spacer-less devices but with relaxed scaling requirements.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/9fbbcd87-eaed-4ca7-910c-36d527bc22f9
- author
- Lindelöw, Fredrik LU ; Sri Garigapati, Navya LU ; Södergren, Lasse LU ; Borg, Mattias LU and Lind, Erik LU
- organization
- publishing date
- 2020-06-01
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- InGaAs, InP, metal-oxide-semiconductor field-effect transistor, nanowire, radio-frequency, spacers
- in
- Semiconductor Science and Technology
- volume
- 35
- issue
- 6
- article number
- 065015
- publisher
- IOP Publishing
- external identifiers
-
- scopus:85086020148
- ISSN
- 0268-1242
- DOI
- 10.1088/1361-6641/ab8398
- language
- English
- LU publication?
- yes
- id
- 9fbbcd87-eaed-4ca7-910c-36d527bc22f9
- date added to LUP
- 2020-06-22 08:59:00
- date last changed
- 2024-07-24 20:32:53
@article{9fbbcd87-eaed-4ca7-910c-36d527bc22f9, abstract = {{<p>We present a semi self-aligned processing scheme for III-V nanowire transistors with novel semiconductor spacers in the shape of Λ-ridges, utilising the effect of slow growth rate on {111}B facets. The addition of spacers relaxes the constraint on the perfect alignment of gate to contact areas to enable low overlap capacitances. The spacers give a field-plate effect that also helps reduce off-state and output conductance while increasing breakdown voltage. Microwave compatible devices with L <sub>g</sub> = 32 nm showing f <sub>T</sub> = 75 GHz and f <sub>max</sub> = 100 GHz are realized with the process, demonstrating matched performance to spacer-less devices but with relaxed scaling requirements.</p>}}, author = {{Lindelöw, Fredrik and Sri Garigapati, Navya and Södergren, Lasse and Borg, Mattias and Lind, Erik}}, issn = {{0268-1242}}, keywords = {{InGaAs; InP; metal-oxide-semiconductor field-effect transistor; nanowire; radio-frequency; spacers}}, language = {{eng}}, month = {{06}}, number = {{6}}, publisher = {{IOP Publishing}}, series = {{Semiconductor Science and Technology}}, title = {{III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications}}, url = {{http://dx.doi.org/10.1088/1361-6641/ab8398}}, doi = {{10.1088/1361-6641/ab8398}}, volume = {{35}}, year = {{2020}}, }