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III-V Nanowires for High-Speed Electronics

Lindelöw, Fredrik LU (2020) In Series of licentiate and doctoral theses 129.
Abstract
III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications.... (More)
III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications. Digital transistors made of a single nanowire show state-of-the art performance with low subthreshold slope and simultaneously high transconductance and high on-current. For RF applications, the nanowire technology faces several challenges, mainly due to its inherent higher parasitic capacitance since the filling factor is less than 1. To adapt the DC processing scheme to RF measurements, we have implemented T-gates, two-finger devices, 100 nanowires in parallel with tight pitch and we have developed novel spacer schemes with capacitances almost as low as recessed HEMT devices. These schemes consists of for instance modulation doped InP spacers as well as self-aligned air-spacers. To make the RF nanowire MOSFETs even more competitive, the transoncductance of RF devices needs to be optimized to match that of DC devices. (Less)
Abstract (Swedish)
III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications.... (More)
III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications. Digital transistors made of a single nanowire show state-of-the art performance with low subthreshold slope and simultaneously high transconductance and high on-current. For RF applications, the nanowire technology faces several challenges, mainly due to its inherent higher parasitic capacitance since the filling factor is less than 1. To adapt the DC processing scheme to RF measurements, we have implemented T-gates, two-finger devices, 100 nanowires in parallel with tight pitch and we have developed novel spacer schemes with capacitances almost as low as recessed HEMT devices. These schemes consists of for instance modulation doped InP spacers as well as self-aligned air-spacers. To make the RF nanowire MOSFETs even more competitive, the transoncductance of RF devices needs to be optimized to match that of DC devices. (Less)
Please use this url to cite or link to this publication:
author
supervisor
opponent
  • Dr. Collaert, Nadine, IMEC, Belgium.
organization
alternative title
III-V nanotrådar för höghastighetselektronik
publishing date
type
Thesis
publication status
published
subject
keywords
Nanowire, MOSFET, Hall, DC, RF, Nanowire, MOSFET, Hall, DC, RF
in
Series of licentiate and doctoral theses
volume
129
edition
Series of licentiate and doctoral theses, 1654-790X
pages
130 pages
publisher
Lund University
defense location
Lecture hall E:1406, building E, Ole Römers väg 3, Faculty of Engineering LTH, Lund University, Lund. Follow via Zoom: : https://lu-se.zoom.us/j/66268490344
defense date
2020-05-20 9:15:00
ISSN
1654-790X
ISBN
978-91-7895-510-7
978-91-7895-511-4
language
English
LU publication?
yes
id
76612a8d-627f-4c65-8cc7-2898feac144d
date added to LUP
2020-04-23 16:07:27
date last changed
2022-04-07 10:25:35
@phdthesis{76612a8d-627f-4c65-8cc7-2898feac144d,
  abstract     = {{III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications. Digital transistors made of a single nanowire show state-of-the art performance with low subthreshold slope and simultaneously high transconductance and high on-current. For RF applications, the nanowire technology faces several challenges, mainly due to its inherent higher parasitic capacitance since the filling factor is less than 1. To adapt the DC processing scheme to RF measurements, we have implemented T-gates, two-finger devices, 100 nanowires in parallel with tight pitch and we have developed novel spacer schemes with capacitances almost as low as recessed HEMT devices. These schemes consists of for instance modulation doped InP spacers as well as self-aligned air-spacers. To make the RF nanowire MOSFETs even more competitive, the transoncductance of RF devices needs to be optimized to match that of DC devices.}},
  author       = {{Lindelöw, Fredrik}},
  isbn         = {{978-91-7895-510-7}},
  issn         = {{1654-790X}},
  keywords     = {{Nanowire, MOSFET, Hall, DC, RF; Nanowire, MOSFET, Hall, DC, RF}},
  language     = {{eng}},
  month        = {{05}},
  publisher    = {{Lund University}},
  school       = {{Lund University}},
  series       = {{Series of licentiate and doctoral theses}},
  title        = {{III-V Nanowires for High-Speed Electronics}},
  url          = {{https://lup.lub.lu.se/search/files/78693958/Fredrik_Lindel_w_Avhandling_No_129.pdf}},
  volume       = {{129}},
  year         = {{2020}},
}