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Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 1 : Experimental Devices

Moselund, Kirsten Emilie; Cutaia, Davide; Schmid, Heinz; Borg, Mattias LU ; Sant, Saurabh; Schenk, Andreas and Riel, Heike (2016) In IEEE Transactions on Electron Devices 63(11). p.4233-4239
Abstract

Tunnel FETs (TFETs) have been identified as the most promising steep slope devices for ultralow power logic circuits. In this paper, we demonstrate in-plane InAs/Si TFETs monolithically integrated on Si, using our recently developed template-assisted selective epitaxy approach. These devices represent some of the most scaled TFETs with dimensions of less than 30 nm, combined with excellent aggregate performance with average subthreshold swing (SS), of around 70 mV/decade combined with ION of a few μA/μm for /VDS/= /VGS/ = 0.5 V. Here, we will discuss the device fabrication as well as the experimental electrical data. Extensive low temperature characterization and activation energy analysis is used to... (More)

Tunnel FETs (TFETs) have been identified as the most promising steep slope devices for ultralow power logic circuits. In this paper, we demonstrate in-plane InAs/Si TFETs monolithically integrated on Si, using our recently developed template-assisted selective epitaxy approach. These devices represent some of the most scaled TFETs with dimensions of less than 30 nm, combined with excellent aggregate performance with average subthreshold swing (SS), of around 70 mV/decade combined with ION of a few μA/μm for /VDS/= /VGS/ = 0.5 V. Here, we will discuss the device fabrication as well as the experimental electrical data. Extensive low temperature characterization and activation energy analysis is used to gain insights into the factors limiting device performance. Combined with the simulation study presented in part 2 of this paper, this will elucidate how traps are ultimately limiting the SS.

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author
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Heterojunction device, InAs, selective epitaxy, tunnel FET (TFET)
in
IEEE Transactions on Electron Devices
volume
63
issue
11
pages
7 pages
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:84994032233
ISSN
0018-9383
DOI
10.1109/TED.2016.2606762
language
English
LU publication?
no
id
e2405528-9fd6-4840-a64a-ec06b2168788
date added to LUP
2017-03-02 13:52:15
date last changed
2017-10-29 04:58:57
@article{e2405528-9fd6-4840-a64a-ec06b2168788,
  abstract     = {<p>Tunnel FETs (TFETs) have been identified as the most promising steep slope devices for ultralow power logic circuits. In this paper, we demonstrate in-plane InAs/Si TFETs monolithically integrated on Si, using our recently developed template-assisted selective epitaxy approach. These devices represent some of the most scaled TFETs with dimensions of less than 30 nm, combined with excellent aggregate performance with average subthreshold swing (SS), of around 70 mV/decade combined with I<sub>ON</sub> of a few μA/μm for /V<sub>DS</sub>/= /V<sub>GS</sub>/ = 0.5 V. Here, we will discuss the device fabrication as well as the experimental electrical data. Extensive low temperature characterization and activation energy analysis is used to gain insights into the factors limiting device performance. Combined with the simulation study presented in part 2 of this paper, this will elucidate how traps are ultimately limiting the SS.</p>},
  articleno    = {7581026},
  author       = {Moselund, Kirsten Emilie and Cutaia, Davide and Schmid, Heinz and Borg, Mattias and Sant, Saurabh and Schenk, Andreas and Riel, Heike},
  issn         = {0018-9383},
  keyword      = {Heterojunction device,InAs,selective epitaxy,tunnel FET (TFET)},
  language     = {eng},
  month        = {11},
  number       = {11},
  pages        = {4233--4239},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Electron Devices},
  title        = {Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 1 : Experimental Devices},
  url          = {http://dx.doi.org/10.1109/TED.2016.2606762},
  volume       = {63},
  year         = {2016},
}