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- 2008
-
Mark
A variable-rate Viterbi decoder in 130-nm CMOS: design, measurements, and cost of flexibility
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Reducing computational complexity of branch metric calculations in a trellis decoder
2008) International Symposium on Wireless Personal Multimedia Communications (WPMC), 2008(
- Contribution to conference › Paper, not in proceeding
- 2007
-
Mark
Survivor path processing in Viterbi decoders using register exchange and traceforward
(
- Contribution to journal › Article
- 2006
-
Mark
Architectural Optimization for Low power in a Reconfigurable UMTS filter
2006) International Symposium on Wireless Personal Multimedia Communications (WPMC), 2006(
- Contribution to conference › Paper, not in proceeding
- 2005
-
Mark
A hardware efficiency analysis for simplified trellis decoding blocks
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Implementation Aspects for Flexible Viterbi Decoders
2005) Swedish System-on-Chip Conference (SSoCC'05)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Area and power efficient trellis computational blocks in 0.13μm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Teaching digital ASIC design to students with heterogeneoms previous knowledge
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A manual on ASIC front to back end design flow
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Architectural considerations for rate-flexible trellis processing blocks
2005) IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, 2005 p.1076-1080(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding