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- 2017
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Mark
Ultra-wideband transmitter design based on a new transmitted reference pulse cluster
(
- Contribution to journal › Article
- 2016
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Mark
A 2.2ps 2-D Gated-Vernier Time-to-Digital Converter with Digital Calibration
(
- Contribution to journal › Article
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Mark
A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
(
- Contribution to journal › Article
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Mark
A 3.5-6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH ΔΣ TDC for low in-band phase noise
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2015
-
Mark
A 65nm CMOS fraction-N digital PLL with shaped in-band phase noise
2015) Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 103fsrms 1.32mW 50MS/s 1.25MHz Bandwidth Two-Step Flash-ΔΣ Time-to-Digital Converter for ADPLL
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 9-bit 1-MS/s 7-μW SAR ADC for ultra low power radio
2015) 32nd NORCHIP Conference, 2014(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A TRPC-UWB Transmitter Front-end Based on Wideband IQ Modulator in 0.13-µm CMOS
2014) IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A LC Quadrature VCO With WideTuningRange For TRPC-UWB Application in 0.13-µm CMOS
2014) IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding