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- 2017
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Mark
A low latency and area efficient FFT processor for massive MIMO systems
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A Cholesky decomposition based massive MIMO uplink detector with adaptive interpolation
(2017) 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 2.8-3.8-GHz Low-Spur DTC-Based DPLL With a Class-D DCO in 65-nm CMOS
- Contribution to journal › Article
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Mark
Two mm-Wave VCOs in 28-nm UTBB FD-SOI CMOS
- Contribution to journal › Letter
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Mark
The World's First Real-Time Testbed for Massive MIMO: Design, Implementation, and Validation
- Contribution to journal › Article
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Mark
An Adaptive QR Decomposition Processor for Carrier Aggregated LTE-A in 28 nm FD-SOI
(2017) In IEEE Transactions on Circuits and Systems I: Regular Papers
- Contribution to journal › Article
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Mark
Performance Characterization of a Real-Time Massive MIMO System with LOS Mobile Channels
- Contribution to journal › Article
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Mark
A general theory of phase noise in transconductor-based harmonic oscillators
- Contribution to journal › Article
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Mark
Logic filter cache for wide-VDD-range processors
(2017) 23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016 p.376-379
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Test Planning for Core-based Integrated Circuits under Power Constraints
- Contribution to journal › Article
