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- 2019
-
Mark
Test Flow Selection for Stacked Integrated Circuits
- Contribution to journal › Article
- 2014
-
Mark
Test Planning and Test Access Mechanism Design for 3D SICs
(2014) Swedish System on Chip Conference (SSoCC), 2014
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Test Planning for 3D SICs using ILP
(2013) Swedish System-On-Chip Conference (SSoCC), 2013
- Contribution to conference › Paper, not in proceeding
