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- 2005
-
Mark
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
Larsson, Erik LU
and Edbom, Stina
(2005)
IFIP WG 10.5 Conference on Very Large Scale Integration System-on-Chip {IFIP VLSI-SOC 2005}
p.429-434
- Contribution to conference › Paper, not in proceeding
-
Mark
Test Scheduling for Modular SOCs in an Abort-on-Fail Environment
Ingelsson, Urban ; Goel, Sandeep Kumar ; Larsson, Erik LU
and Marinissen, Erik Jan
(2005)
IEEE European Test Symposium ETS 05, 2005
p.8-13
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Boundary-Scan Test Control in the ATCA Standard
Bäckström, David ; Carlsson, Gunnar and Larsson, Erik LU
(2005)
- Contribution to conference › Paper, not in proceeding
-
Mark
A Test Data Compression Architecture with Abort-on Fail Capability
- Contribution to conference › Paper, not in proceeding
- 2004
-
Mark
An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Integrating Core Selection in the SOC Test Solution Design-Flow
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Core Selection Integrated in the SOC Test Solution Design-Flow
Larsson, Erik LU
(2004)
- Other contribution › Miscellaneous
-
Mark
High strain-rate tensile testing and viscoplastic parameter identification using microscopic high-speed photography
- Contribution to journal › Article
- 2003
-
Mark
Defect Probability-based System-On-Chip Test Scheduling
Larsson, Erik LU
; Pouget, Julien
and Peng, Zebo
(2003)
6th IEEE International Workshop on Design and Diagnostics of Electronics Circuits and Systems DDECS 03,2003
p.25-32
- Contribution to conference › Paper, not in proceeding
-
Mark
System-on-Chip Test Scheduling based on Defect Probability
Larsson, Erik LU
; Pouget, Julien
and Peng, Zebo
(2003)
- Other contribution › Miscellaneous