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- 2020
-
Mark
An N-Path Filter Design Methodology With Harmonic Rejection, Power Reduction, Foldback Elimination, and Spectrum Shaping
2020) In IEEE Transactions on Circuits and Systems I: Regular Papers(
- Contribution to journal › Article
- 2017
-
Mark
Methods in field chronobiology
(
- Contribution to journal › Scientific review
- 2011
-
Mark
A GALS ASIC implementation from a CAL dataflow description
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1994
-
Mark
A 3-level asynchronous protocol for a differential two-wire communication link
(
- Contribution to journal › Article