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2023
Mark Vertical III-V Nanowire Tunnel Field-Effect Transistors : A Circuit Perspective
Rangasamy, Gautham ^LU (2023)
- Thesis › Doctoral thesis (compilation)
2015
Mark Fabrication and analysis of vertical p-type InAs-Si nanowire tunnel FETs
Cutaia, Davide ; Moselund, Kirsten E. ; Borg, M. ^LU ; Schmid, Heinz ; Gignac, L. ; Breslin, C. M. ; Karg, Siegfried ; Uccelli, Emanuele ; Nirmalraj, P. and Riel, Heike (2015) 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2015 p.61-64
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2014
Mark Supply-Voltage Down Conversion for Digital CMOS Designs
Nilsson, Peter ^LU ; Azher Ali, Mohammed ; Ethiraj, Manivannan and Sherazi, Syed Muhammad Yasser ^LU (2014) IEEE 21th International Conference on Electronics, Circuits and Systems, 2014
- Contribution to conference › Paper, not in proceeding
2000
Mark A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs
Olsson, Thomas ^LU ; Nilsson, Peter ^LU ; Meincke, Thomas ; Hemani, Ahmed and Torkelson, Mats ^LU (2000) IEEE International Symposium on Circuits and Systems (ISCAS), 2000 3. p.13-16
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding

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