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- 2014
-
Mark
Continuous-Time Delta-Sigma Modulators for Wireless Communication
2014) In Series of licentiate and doctoral dissertations(
- Thesis › Doctoral thesis (compilation)
- 2013
-
Mark
Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations
(
- Contribution to journal › Article
-
Mark
A 9MHz Filtering ADC with Additional 2nd-Order Delta-Sigma Modulator Noise Suppression
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 31.25/125MSps Continuous-Time Delta-Sigma ADC with 64/59dB SNDR in 130nm CMOS
2013) NORCHIP Conference, 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 7.5 mW 9 MHz CT Delta-Sigma Modulator in 65 nm CMOS with 69 dB SNDR and Reduced Sensitivity to Loop Delay Variations
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2010
-
Mark
Impact of MOS threshold-voltage mismatch in current-steering DACs for CT delta-sigma modulators
(
- Contribution to conference › Paper, not in proceeding