Characterization of Drain-Induced Barrier Lowering in GaN HEMTs Using a Drain Current Injection Technique
(2024) In IEEE Transactions on Electron Devices 71(12). p.7383-7389- Abstract
Assessing short channel effects (SCEs) is crucial in the high-frequency optimization of downscaled field-effect transistors (FETs) such as GaN high electron mobility transistors (HEMTs). Drain-induced barrier lowering (DIBL) is commonly used for quantifying the ability of the gate to modulate the drain–source current at high drain voltages. DIBL is traditionally extracted from the relative shift of the threshold voltage at different drain–source voltages. In this article, we propose a new method based on a drain current injection technique (DCIT) to assess DIBL. This method facilitates a direct measure of the threshold voltage over a wide range of drain–source voltages in a single measurement. The method is demonstrated and compared to... (More)
Assessing short channel effects (SCEs) is crucial in the high-frequency optimization of downscaled field-effect transistors (FETs) such as GaN high electron mobility transistors (HEMTs). Drain-induced barrier lowering (DIBL) is commonly used for quantifying the ability of the gate to modulate the drain–source current at high drain voltages. DIBL is traditionally extracted from the relative shift of the threshold voltage at different drain–source voltages. In this article, we propose a new method based on a drain current injection technique (DCIT) to assess DIBL. This method facilitates a direct measure of the threshold voltage over a wide range of drain–source voltages in a single measurement. The method is demonstrated and compared to the conventional method using AlGaN/GaN and InAlGaN HEMTs with a Fe-doped buffer and a C-doped AlGaN back-barrier, respectively. Furthermore, the impact of different gate lengths and GaN channel layer thicknesses is presented. The measurements are analyzed and discussed with supporting technology computer-aided design (TCAD) simulations. The proposed method facilitates a more general and detailed measurement of the DIBL for HEMTs.
(Less)
- author
- Hult, Björn ; Bergsten, Johan ; Ferrand-Drake Del Castillo, Ragnar ; Darakchieva, Vanya LU ; Malmros, Anna ; Hjelmgren, Hans ; Thorsell, Mattias and Rorsman, Niklas
- organization
- publishing date
- 2024
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Drain current injection technique (DCIT), drain-induced barrier lowering (DIBL), GaN, high electron mobility transistor (HEMT), short-channel effect (SCE)
- in
- IEEE Transactions on Electron Devices
- volume
- 71
- issue
- 12
- pages
- 7 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- scopus:85209913838
- ISSN
- 0018-9383
- DOI
- 10.1109/TED.2024.3489592
- language
- English
- LU publication?
- yes
- id
- b208c2c1-52d8-4e3e-aa73-644facdcdf74
- date added to LUP
- 2025-02-17 11:27:34
- date last changed
- 2025-06-23 12:13:48
@article{b208c2c1-52d8-4e3e-aa73-644facdcdf74, abstract = {{<p>Assessing short channel effects (SCEs) is crucial in the high-frequency optimization of downscaled field-effect transistors (FETs) such as GaN high electron mobility transistors (HEMTs). Drain-induced barrier lowering (DIBL) is commonly used for quantifying the ability of the gate to modulate the drain–source current at high drain voltages. DIBL is traditionally extracted from the relative shift of the threshold voltage at different drain–source voltages. In this article, we propose a new method based on a drain current injection technique (DCIT) to assess DIBL. This method facilitates a direct measure of the threshold voltage over a wide range of drain–source voltages in a single measurement. The method is demonstrated and compared to the conventional method using AlGaN/GaN and InAlGaN HEMTs with a Fe-doped buffer and a C-doped AlGaN back-barrier, respectively. Furthermore, the impact of different gate lengths and GaN channel layer thicknesses is presented. The measurements are analyzed and discussed with supporting technology computer-aided design (TCAD) simulations. The proposed method facilitates a more general and detailed measurement of the DIBL for HEMTs.</p>}}, author = {{Hult, Björn and Bergsten, Johan and Ferrand-Drake Del Castillo, Ragnar and Darakchieva, Vanya and Malmros, Anna and Hjelmgren, Hans and Thorsell, Mattias and Rorsman, Niklas}}, issn = {{0018-9383}}, keywords = {{Drain current injection technique (DCIT); drain-induced barrier lowering (DIBL); GaN; high electron mobility transistor (HEMT); short-channel effect (SCE)}}, language = {{eng}}, number = {{12}}, pages = {{7383--7389}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Transactions on Electron Devices}}, title = {{Characterization of Drain-Induced Barrier Lowering in GaN HEMTs Using a Drain Current Injection Technique}}, url = {{http://dx.doi.org/10.1109/TED.2024.3489592}}, doi = {{10.1109/TED.2024.3489592}}, volume = {{71}}, year = {{2024}}, }