Skip to main content

Lund University Publications

LUND UNIVERSITY LIBRARIES

Memory State Dynamics in BEOL FeFETs : Impact of Area Ratio on Analog Write Mechanisms and Charging

Dahlberg, Hannes LU ; Kaatranen, Oscar ; Persson, Karl Magnus LU ; Rantala, Arto ; Flak, Jacek and Wernersson, Lars Erik LU (2025) In IEEE Access 13. p.9923-9930
Abstract

This work presents dynamic state writing by combining ferroelectric (FE) polarization together with charge injection (CI) on Si-based ferroelectric MOSFETs as a novel approach for non-volatile memory design. FE capacitors are non-destructively integrated in the Back-End-of-Line (BEOL) with Si MOSFETs to create FE-Metal-FETs (FeMFETs). We explore the FE/MOS area ratio (AR) as a critical design parameter, particularly in the context of dynamic writing processes, where various voltage pulse trains are applied for analog potentiation and depression of the memory state. AR significantly influences both the electric field distribution over the FE and the extent of CI from the top electrode. Constant-pulse writing schemes enable analog... (More)

This work presents dynamic state writing by combining ferroelectric (FE) polarization together with charge injection (CI) on Si-based ferroelectric MOSFETs as a novel approach for non-volatile memory design. FE capacitors are non-destructively integrated in the Back-End-of-Line (BEOL) with Si MOSFETs to create FE-Metal-FETs (FeMFETs). We explore the FE/MOS area ratio (AR) as a critical design parameter, particularly in the context of dynamic writing processes, where various voltage pulse trains are applied for analog potentiation and depression of the memory state. AR significantly influences both the electric field distribution over the FE and the extent of CI from the top electrode. Constant-pulse writing schemes enable analog threshold voltage modulation by considering the AR, with reduced voltages and faster operation for smaller ARs. Retention of intermittent states written by FE polarization combined with CI is demonstrated, illustrating the stability and effectiveness of FeMFET devices and AR optimization for memory applications.

(Less)
Please use this url to cite or link to this publication:
author
; ; ; ; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
BEOL integration, CMOS, FeFET, ferroelectricity, HZO, non-volatile memory, switching dynamics
in
IEEE Access
volume
13
pages
8 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85214801882
ISSN
2169-3536
DOI
10.1109/ACCESS.2025.3527628
language
English
LU publication?
yes
additional info
Publisher Copyright: © 2013 IEEE.
id
db16585a-2cd4-4747-89b1-b6a092f9c426
date added to LUP
2025-02-03 14:00:09
date last changed
2025-04-04 15:41:10
@article{db16585a-2cd4-4747-89b1-b6a092f9c426,
  abstract     = {{<p>This work presents dynamic state writing by combining ferroelectric (FE) polarization together with charge injection (CI) on Si-based ferroelectric MOSFETs as a novel approach for non-volatile memory design. FE capacitors are non-destructively integrated in the Back-End-of-Line (BEOL) with Si MOSFETs to create FE-Metal-FETs (FeMFETs). We explore the FE/MOS area ratio (AR) as a critical design parameter, particularly in the context of dynamic writing processes, where various voltage pulse trains are applied for analog potentiation and depression of the memory state. AR significantly influences both the electric field distribution over the FE and the extent of CI from the top electrode. Constant-pulse writing schemes enable analog threshold voltage modulation by considering the AR, with reduced voltages and faster operation for smaller ARs. Retention of intermittent states written by FE polarization combined with CI is demonstrated, illustrating the stability and effectiveness of FeMFET devices and AR optimization for memory applications.</p>}},
  author       = {{Dahlberg, Hannes and Kaatranen, Oscar and Persson, Karl Magnus and Rantala, Arto and Flak, Jacek and Wernersson, Lars Erik}},
  issn         = {{2169-3536}},
  keywords     = {{BEOL integration; CMOS; FeFET; ferroelectricity; HZO; non-volatile memory; switching dynamics}},
  language     = {{eng}},
  pages        = {{9923--9930}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  series       = {{IEEE Access}},
  title        = {{Memory State Dynamics in BEOL FeFETs : Impact of Area Ratio on Analog Write Mechanisms and Charging}},
  url          = {{http://dx.doi.org/10.1109/ACCESS.2025.3527628}},
  doi          = {{10.1109/ACCESS.2025.3527628}},
  volume       = {{13}},
  year         = {{2025}},
}