Peter Nilsson (Former)
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- 2010
-
Mark
Vertical InAs nanowire wrap gate transistors for integration on a Si platform
(2010) GigaHertz Symposium, 2010
- Contribution to conference › Paper, not in proceeding
-
Mark
Energy efficiency in Sub-VT of various 16-bit adder structures in 65 nm CMOS
(2010) Swedish System-on-Chip Conference 2010 (SSoCC'10)
- Contribution to conference › Paper, not in proceeding
-
Mark
Power consumption in digital filter architectures in 65 nm CMOS technology
(2010) GigaHertz Symposium, 2010
- Contribution to conference › Paper, not in proceeding
-
Mark
On MB OFDM-UWB channel estimation
(2010) GigaHertz Symposium, 2010
- Contribution to conference › Paper, not in proceeding
-
Mark
Ultra low energy vs throughput design exploration of 65 nm sub-VT CMOS digital filters
(2010) NORCHIP Conference, 2010
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On MB OFDM-UWB channel estimation
(2010) GigaHertz Symposium, 2010
- Contribution to conference › Abstract
- 2009
-
Mark
Architectures and arithmetic for low static power consumption in nanoscale CMOS
(2009) In VLSI Design
- Contribution to journal › Article
-
Mark
Parabolic synthesis methodology implemented on the sine function
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A methodology for parabolic synthesis
(2009)
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
A study on leakage minimization by RBB in 65 nm CMOS
(2009) Swedish System-on-Chip Conference 2009 (SSoCC'09)
- Contribution to conference › Paper, not in proceeding
