Syed Muhammad Yasser Sherazi (Former)
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- 2010
-
Mark
Reduction of substrate noise in sub clock frequency range
(
- Contribution to journal › Article
-
Mark
Ultra low energy vs throughput design exploration of 65 nm sub-VT CMOS digital filters
2010) NORCHIP Conference, 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Power consumption in digital filter architectures in 65 nm CMOS technology
2010) GigaHertz Symposium, 2010(
- Contribution to conference › Paper, not in proceeding
-
Mark
Energy efficiency in Sub-VT of various 16-bit adder structures in 65 nm CMOS
2010) Swedish System-on-Chip Conference 2010 (SSoCC'10)(
- Contribution to conference › Paper, not in proceeding
- 2009
-
Mark
A study on leakage minimization by RBB in 65 nm CMOS
2009) Swedish System-on-Chip Conference 2009 (SSoCC'09)(
- Contribution to conference › Paper, not in proceeding
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