Henrik Sjöland
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- 2019
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Mark
A 65-nm CMOS Low-Power Front-End for 3rd Generation DNA Sequencing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
A 4.3-mW mm-Wave Divide-by-Two Circuit with 30% Locking Range in 28-nm FD-SOI CMOS
2018) 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers
(
- Contribution to journal › Article
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Mark
Two Ultra-Low Power MM-Wave Push-Pull VCOs in FD-SOI CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding