Thomas Olsson (Former)
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- 2002
-
Mark
An all-digital PLL clock multiplier
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2001
-
Mark
A fully Integrated Standard-Cell Digital PLL
(
- Contribution to journal › Article
-
Mark
A Digital PLL Made from Standard Cells
2001) 11:th European Conference on Circuit Design (ECCTD’01)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Dual Supply-Voltage Scaling for Reconfigurable SoCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
Globally Asynchronous Locally Synchronous Architecture for Large High-performance ASICs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Digitally Controlled On-Chip Clock Multiplier for Globally Asynchronous Locally Synchronous Systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1998
-
Mark
Hardware Implementation Aspects of a Detector Based on Successive Interference Cancellation in a DS/CDMA System
1998) 9th International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC’98) Conference 1. p.391-395(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Interference cancellation detectors in a hardware implementation perspective
1998) NORCHIP Conference, 1998(
- Contribution to conference › Paper, not in proceeding