Temperature and annealing effects on InAs nanowire MOSFETs
(2011) 17th International Conference on Insultating Films on Semiconductors 88(7). p.1105-1108- Abstract
- We report on temperature dependence on the drive current as well as long-term effects of annealing in vertical InAs nanowire Field-Effect Transistors. Negatively charged traps in the HfO2 gate dielectric are suggested as one major factor in explaining the effects observed in the transistor characteristics. An energy barrier may be correlated with an un-gated InAs nanowire region covered with HfO2 and the effects of annealing may be explained by changed charging on defects in the oxide. Initial simulations confirm the general effects on the I-V characteristics by including fixed charge. (c) 2011 Elsevier B.V. All rights reserved.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/2093948
- author
- Johansson, Sofia LU ; Gorji, Sepideh LU ; Borg, Mattias LU ; Lind, Erik LU and Wernersson, Lars-Erik LU
- organization
- publishing date
- 2011
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- InAs, Nanowire, FET, High-k, HfO2, MOSFET, III-V semiconductor, Annealing
- host publication
- Microelectronic Engineering
- editor
- Gogolides, Evangelos
- volume
- 88
- issue
- 7
- pages
- 1105 - 1108
- publisher
- Elsevier
- conference name
- 17th International Conference on Insultating Films on Semiconductors
- conference location
- Grenoble, France
- conference dates
- 2011-06-21 - 2011-06-24
- external identifiers
-
- wos:000292572700017
- scopus:79958051856
- ISSN
- 0167-9317
- 1873-5568
- DOI
- 10.1016/j.mee.2011.03.128
- language
- English
- LU publication?
- yes
- id
- 1d8e34bb-491e-4c2f-9339-9441fb283161 (old id 2093948)
- date added to LUP
- 2016-04-01 11:08:18
- date last changed
- 2024-10-07 22:06:07
@inproceedings{1d8e34bb-491e-4c2f-9339-9441fb283161, abstract = {{We report on temperature dependence on the drive current as well as long-term effects of annealing in vertical InAs nanowire Field-Effect Transistors. Negatively charged traps in the HfO2 gate dielectric are suggested as one major factor in explaining the effects observed in the transistor characteristics. An energy barrier may be correlated with an un-gated InAs nanowire region covered with HfO2 and the effects of annealing may be explained by changed charging on defects in the oxide. Initial simulations confirm the general effects on the I-V characteristics by including fixed charge. (c) 2011 Elsevier B.V. All rights reserved.}}, author = {{Johansson, Sofia and Gorji, Sepideh and Borg, Mattias and Lind, Erik and Wernersson, Lars-Erik}}, booktitle = {{Microelectronic Engineering}}, editor = {{Gogolides, Evangelos}}, issn = {{0167-9317}}, keywords = {{InAs; Nanowire; FET; High-k; HfO2; MOSFET; III-V semiconductor; Annealing}}, language = {{eng}}, number = {{7}}, pages = {{1105--1108}}, publisher = {{Elsevier}}, title = {{Temperature and annealing effects on InAs nanowire MOSFETs}}, url = {{https://lup.lub.lu.se/search/files/2408606/2224529.pdf}}, doi = {{10.1016/j.mee.2011.03.128}}, volume = {{88}}, year = {{2011}}, }