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- 2015
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Mark
III-V nanowires for logics and beyond
- Contribution to journal › Article
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Mark
Transfer of vertical nanowire arrays on polycaprolactone substrates for biological applications
- Contribution to journal › Article
- 2012
-
Mark
Fabrication of high aspect ratio SU-8 micropillar arrays
- Contribution to journal › Article
-
Mark
Fabrication of bottle-shaped nanochannels in fused silica using a self-closing effect
- Contribution to journal › Article
- 2011
-
Mark
Temperature and annealing effects on InAs nanowire MOSFETs
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Development of nanoporous gold electrodes for electrochemical applications
- Contribution to journal › Article
-
Mark
Fabrication and characterization of bilayer metal wire-grid polarizer using nanoimprint lithography on flexible plastic substrate
- Contribution to journal › Article
-
Mark
Temperature and frequency characterization of InAs nanowire and HfO2 interface using capacitance-voltage method
(2011) EMRS 2010 Spring Meeting on Post-Si-CMOS Electronic Devices - The Role of Ge and III-V Materials 88(4). p.444-447
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2009
-
Mark
Deposition of HfO2 on InAs by atomic-layer deposition
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Negative UV–NIL (NUV–NIL) – A mix-and-match NIL and UV strategy for realisation of nano- and micrometre structures
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
