Multi-level vertical III-V nanowire gate-all-rround ferroelectric FETs for in-memory computing
(2025)- Abstract
- Hafnia-based ferroelectric Field-Effect Transistors (FeFETs) are promising candidates for non-volatile memory and neuromorphic computing due to their fast switching, low power consumption, and CMOS compatibility [1]–[3]. IIIV materials, such as InAs, offer superior electron transport properties [4], [5], and high remnant polarization at low annealing temperatures when integrated with hafnia-based ferroelectrics [6], [7]. This work uses retention measurements to explore the multi-level characterization of an InAs vertical nanowire gate-all-around FeFET (VNW GAA FeFET). The VNW GAA architecture is promising for increased scalability [8], [9], while the multi-level switching behavior of FeFETs enhances their utility in in-memory computing and... (More)
- Hafnia-based ferroelectric Field-Effect Transistors (FeFETs) are promising candidates for non-volatile memory and neuromorphic computing due to their fast switching, low power consumption, and CMOS compatibility [1]–[3]. IIIV materials, such as InAs, offer superior electron transport properties [4], [5], and high remnant polarization at low annealing temperatures when integrated with hafnia-based ferroelectrics [6], [7]. This work uses retention measurements to explore the multi-level characterization of an InAs vertical nanowire gate-all-around FeFET (VNW GAA FeFET). The VNW GAA architecture is promising for increased scalability [8], [9], while the multi-level switching behavior of FeFETs enhances their utility in in-memory computing and neuromorphic applications [10]. This study advances III-V FeFET technology by demonstrating 100 s long multi-level switching, which is important for next-generation memory and AI hardware. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/c9ec4cf0-9144-49d2-831e-22ac963eeac8
- author
- Mamidala, Karthik Ram
LU
; Zhu, Zhongyunshen
LU
and Wernersson, Lars-Erik LU
- organization
- publishing date
- 2025-08-11
- type
- Contribution to conference
- publication status
- published
- subject
- pages
- 2 pages
- DOI
- 10.1109/DRC66027.2025.11105745
- language
- English
- LU publication?
- yes
- id
- c9ec4cf0-9144-49d2-831e-22ac963eeac8
- date added to LUP
- 2025-08-13 21:20:44
- date last changed
- 2025-09-24 14:33:21
@misc{c9ec4cf0-9144-49d2-831e-22ac963eeac8, abstract = {{Hafnia-based ferroelectric Field-Effect Transistors (FeFETs) are promising candidates for non-volatile memory and neuromorphic computing due to their fast switching, low power consumption, and CMOS compatibility [1]–[3]. IIIV materials, such as InAs, offer superior electron transport properties [4], [5], and high remnant polarization at low annealing temperatures when integrated with hafnia-based ferroelectrics [6], [7]. This work uses retention measurements to explore the multi-level characterization of an InAs vertical nanowire gate-all-around FeFET (VNW GAA FeFET). The VNW GAA architecture is promising for increased scalability [8], [9], while the multi-level switching behavior of FeFETs enhances their utility in in-memory computing and neuromorphic applications [10]. This study advances III-V FeFET technology by demonstrating 100 s long multi-level switching, which is important for next-generation memory and AI hardware.}}, author = {{Mamidala, Karthik Ram and Zhu, Zhongyunshen and Wernersson, Lars-Erik}}, language = {{eng}}, month = {{08}}, title = {{Multi-level vertical III-V nanowire gate-all-rround ferroelectric FETs for in-memory computing}}, url = {{http://dx.doi.org/10.1109/DRC66027.2025.11105745}}, doi = {{10.1109/DRC66027.2025.11105745}}, year = {{2025}}, }