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Combining axial and radial nanowire heterostructures: Radial Esaki diodes and tunnel field-effect transistors

Dey, Anil LU ; Svensson, Johannes LU ; Ek, Martin LU ; Lind, Erik LU ; Thelander, Claes LU and Wernersson, Lars-Erik LU (2013) In Nano Letters 13(12). p.5919-5924
Abstract
The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit. The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties. In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however... (More)
The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit. The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties. In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects, however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak current, Jpeak = 2310 kA/cm2, than the maximum peak current of axial GaSb/InAs(Sb) Esaki diodes per unit chip area. The radial TFETs also deliver high peak current densities Jpeak = 1210 kA/cm2 while their axial counterparts at most carry Jpeak = 77 kA/cm2, normalized to the largest cross-sectional area of the nanowire. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Three-dimensional (3D) nanowire device architecture, radial tunnel field-effect transistor, TFET, nanowire, InAs, GaSb, broken gap
in
Nano Letters
volume
13
issue
12
pages
5919 - 5924
publisher
The American Chemical Society
external identifiers
  • wos:000328439200025
  • pmid:24224956
  • scopus:84890343382
ISSN
1530-6992
DOI
10.1021/nl4029494
language
English
LU publication?
yes
id
ff0a7fb6-a718-4632-83f2-fbd98e718384 (old id 4153521)
date added to LUP
2013-11-14 22:14:32
date last changed
2019-06-19 01:28:08
@article{ff0a7fb6-a718-4632-83f2-fbd98e718384,
  abstract     = {The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit. The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties. In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects, however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak current, Jpeak = 2310 kA/cm2, than the maximum peak current of axial GaSb/InAs(Sb) Esaki diodes per unit chip area. The radial TFETs also deliver high peak current densities Jpeak = 1210 kA/cm2 while their axial counterparts at most carry Jpeak = 77 kA/cm2, normalized to the largest cross-sectional area of the nanowire.},
  author       = {Dey, Anil and Svensson, Johannes and Ek, Martin and Lind, Erik and Thelander, Claes and Wernersson, Lars-Erik},
  issn         = {1530-6992},
  keyword      = {Three-dimensional (3D) nanowire device architecture,radial tunnel field-effect transistor,TFET,nanowire,InAs,GaSb,broken gap},
  language     = {eng},
  number       = {12},
  pages        = {5919--5924},
  publisher    = {The American Chemical Society},
  series       = {Nano Letters},
  title        = {Combining axial and radial nanowire heterostructures: Radial Esaki diodes and tunnel field-effect transistors},
  url          = {http://dx.doi.org/10.1021/nl4029494},
  volume       = {13},
  year         = {2013},
}