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2025
Mark In Situ Study of Axial GaSb/GaAs Nanowire Heterostructure Formation
Marnauza, Mikelis ^LU ; Sjökvist, Robin ^LU ; Kraina, Azemina ^LU ; Jacobsson, Daniel ^LU and Dick, Kimberly A. ^LU (2025) In ACS Nanoscience AU 5(3). p.208-216
- Contribution to journal › Article
2023
Mark Vertical III-V Nanowire Transistors for Low-Power Electronics
Krishnaraja, Abinaya ^LU (2023)
- Thesis › Doctoral thesis (compilation)
2022
Mark Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
Zhu, Zhongyunshen ^LU ; Jönsson, Adam ^LU ; Liu, Yen Po ^LU ; Svensson, Johannes ^LU ; Timm, Rainer ^LU and Wernersson, Lars Erik ^LU (2022) In ACS Applied Electronic Materials 4(1). p.531-538
- Contribution to journal › Article
Mark Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing
Zhu, Zhongyunshen ^LU ; Svensson, Johannes ^LU ; Jönsson, Adam ^LU and Wernersson, Lars Erik ^LU (2022) In Nanotechnology 33(7).
- Contribution to journal › Article
Mark Transport in nanowire-based quantum dot systems: Heating electrons and confining holes
Dorsch, Sven ^LU (2022)
- Thesis › Doctoral thesis (compilation)
2021
Mark Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
Jönsson, Adam ^LU (2021)
- Thesis › Doctoral thesis (compilation)
2020
Mark Theory of electronic structure and transport in heterostructure nanowires
Viñas Boström, Florinda ^LU (2020)
- Thesis › Doctoral thesis (compilation)
Mark Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU ; Memisevic, Elvedin ^LU ; Zhu, Zhongyunshen ^LU ; Persson, Axel R. ^LU ; Lind, Erik ^LU ; Wallenberg, Lars Reine ^LU and Wernersson, Lars Erik ^LU (2020) In ACS Applied Electronic Materials 2(9). p.2882-2887
- Contribution to journal › Article
2018
Mark A Self-aligned Gate-last Process applied to All-III-V CMOS on Si
Jonsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2018) In IEEE Electron Device Letters 39(7). p.935-938
- Contribution to journal › Article
Mark Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade
Memisevic, Elvedin ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2018) In IEEE Electron Device Letters 39(7). p.1089-1091
- Contribution to journal › Article

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