Advanced

Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade

Memisevic, Elvedin LU ; Svensson, Johannes LU ; Lind, Erik LU and Wernersson, Lars Erik LU (2018) In IEEE Electron Device Letters 39(7). p.1089-1091
Abstract

We present experimental data from vertical InAs/InGaAsSb/GaSb nanowire tunnel field-effect transistors with channel diameter scaled down to 10 nm and ability to reach a point subthreshold swing of 35 mV/decade at VDS = 0.05 V. Furthermore, the impact of drain, channel and source diameter scaling on the subthreshold swing and currents are studied. Impact of gate-overlap is more evident for devices with highly scaled source due to strong reduction of the current. Furthermore, small channel diameter makes these devices more susceptible to Random Telegraph Signal noise.

Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
GaSb, Heterojunctions, III-V, InAs, InGaAsSb, Logic gates, Nanoscale devices, Resistance, RTS, steep-slope, TFET, TFETs, Vertical Nanowires
in
IEEE Electron Device Letters
volume
39
issue
7
pages
1089 - 1091
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85046995042
ISSN
0741-3106
DOI
10.1109/LED.2018.2836862
language
English
LU publication?
yes
id
b0d46fda-8c34-4e5d-8864-1945ecc73d11
date added to LUP
2018-05-30 13:12:54
date last changed
2019-08-14 04:17:29
@article{b0d46fda-8c34-4e5d-8864-1945ecc73d11,
  abstract     = {<p>We present experimental data from vertical InAs/InGaAsSb/GaSb nanowire tunnel field-effect transistors with channel diameter scaled down to 10 nm and ability to reach a point subthreshold swing of 35 mV/decade at VDS &amp;#x0003D; 0.05 V. Furthermore, the impact of drain, channel and source diameter scaling on the subthreshold swing and currents are studied. Impact of gate-overlap is more evident for devices with highly scaled source due to strong reduction of the current. Furthermore, small channel diameter makes these devices more susceptible to Random Telegraph Signal noise.</p>},
  author       = {Memisevic, Elvedin and Svensson, Johannes and Lind, Erik and Wernersson, Lars Erik},
  issn         = {0741-3106},
  keyword      = {GaSb,Heterojunctions,III-V,InAs,InGaAsSb,Logic gates,Nanoscale devices,Resistance,RTS,steep-slope,TFET,TFETs,Vertical Nanowires},
  language     = {eng},
  number       = {7},
  pages        = {1089--1091},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Electron Device Letters},
  title        = {Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade},
  url          = {http://dx.doi.org/10.1109/LED.2018.2836862},
  volume       = {39},
  year         = {2018},
}