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- 2003
-
Mark
Implementation of a Highly Scalable Architecture for Fast Inversion of Triangular Matrices
(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Pre-Study of Design Space Exploration for Hardware-Software Systems
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation of a Scalable Matrix Inversion Architecture for Triangular Matrices
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Channel Coding in a Varying Environment
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Design and ASIC Performance Analysis of a Reconfigurable Digital Filter for a UMTS Application
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
FPGA Implementation of Controller-Datapath Pair in Custom Image Processor Design
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Power aware communications for wireless OptiMised personal area network
2003) Invited talk at the Mobile Venue workshop(
- Contribution to conference › Paper, not in proceeding
- 2002
-
Mark
R-wave detection for pacemakers using a matched filter based on an artificial neural network
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Alternative Hardware Implementation of the Tailbiting BCJR Decoder
2002) Nordic Radio Science and Communication Conference 2002(
- Contribution to conference › Paper, not in proceeding
-
Mark
A new System-on-Chip Curriculum at Lund University
2002) European Workshop on Microelectronics Education (EWME)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Architectural tradeoffs for a custom implementation of an acoustic echo canceller
2002) NORSIG(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Pipelined FFT Processor using Data Scaling and Reduced Memory Requirements
2002) Norchip Conference, 2002(
- Contribution to conference › Paper, not in proceeding
-
Mark
Controller Synthesis for Hardware Accelerator Design
2002) Swedish System-on-Chip Conference 2002 (SSoCC 02)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Optimised QR-Decomposition Core for Adaptive Beamforming
2002) Nordic Radio Science and Communication Conference 2002(
- Contribution to conference › Paper, not in proceeding
- 2001
-
Mark
Precision Issues in the implementation of BCJR decoders
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
QRS detection for pacemakers in a noisy environment using a time lagged artificial neural network
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
A low logic depth complex multiplier using distributed arithmetic
(
- Contribution to journal › Article
-
Mark
Co-optimization of FFT and FIR in a delayless acoustic echo canceller implementation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
A custom image convolution DSP with a sustained calculation capacity of >1 GMAC/s and low I/O bandwidth
(
- Contribution to journal › Article
-
Mark
Implementation Issues for acoustic echo cancellers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding