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- 2003
-
Mark
FPGA implementation of real-time image convolutions with three level of memory hierarchy
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Providing flexibility in a convolutional encoder
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Accelerating signal processing algorithms in digital holography using an FPGA platform
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A configurable divider using digit recurrence
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2048 complex point FFT processor using a novel data scaling approach
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design and ASIC Performance Analysis of a Reconfigurable Digital Filter for a UMTS Application
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Implementation of a Scalable Matrix Inversion Architecture for Triangular Matrices
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Power aware communications for wireless OptiMised personal area network
2003) Invited talk at the Mobile Venue workshop(
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation of a Highly Scalable Architecture for Fast Inversion of Triangular Matrices
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Channel Coding in a Varying Environment
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Contribution to conference › Paper, not in proceeding