1 – 8 of 8
- show: 10
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=""
width=""
height=""
allowtransparency="true"
frameborder="0">
</iframe>
- 2021
-
Mark
Baseband Processing for 5G and Beyond: Algorithms, VLSI Architectures, and Co-design
(2021) In Series of licentiate and doctoral theses
- Thesis › Doctoral thesis (compilation)
- 2017
-
Mark
A low latency and area efficient FFT processor for massive MIMO systems
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
An Efficient VLSI Architecture of QPP Interleaver/deinterleaver for LTE Turbo Coding
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
Ultra High-throughput Architectures for Hard-output MIMO Detectors in the Complex Domain
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2010
-
Mark
A Modified Complex K-best Scheme for High-speed Hard-output MIMO Detectors
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
A scalable pipelined complex valued matrix inversion architecture
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2003
-
Mark
Providing flexibility in a convolutional encoder
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
FPGA implementation of real-time image convolutions with three level of memory hierarchy
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
