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- 2018
-
Mark
Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade
(
- Contribution to journal › Article
- 2015
-
Mark
Vertical InAs-Si gate-all-around tunnel FETs integrated on Si using selective epitaxy in nanotube templates
(
- Contribution to journal › Article
- 2010
-
Mark
Gold-free GaAs/GaAsSb heterostructure nanowires grown on silicon
(
- Contribution to journal › Article
- 1996
-
Mark
Electron Transport in Low Dimensional Systems
1996)(
- Thesis › Doctoral thesis (compilation)