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- 2020
-
Mark
A 10-bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration
2020) 2020 IEEE International Symposium on Circuits and Systems (ISCAS)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs
2020) 2020 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2019
-
Mark
A 5 GHz CT ^Delta;Σ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS
2019) 5th IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2017
-
Mark
A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI
2017) 43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2016
-
Mark
A continuous-time delta-sigma ADC with integrated digital background calibration
(
- Contribution to journal › Article
-
Mark
A 65 nm CMOS Wideband Radio Receiver with ΔΣ-Based A/D-Converting Channel-Select Filters
(
- Contribution to journal › Article
- 2015
-
Mark
A 0.6-3.0 GHz 65 nm CMOS Radio Receiver with DS-based A/D-Converting Channel-Select Filters
2015) IEEE European Solid State Circuits Conference, ESSCIRC 2015(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding