Adam Jönsson (Former)

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2018
Mark A Self-aligned Gate-last Process applied to All-III-V CMOS on Si
Jonsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2018) In IEEE Electron Device Letters 39(7). p.935-938
- Contribution to journal › Article
Mark CMOS Integration Based on All-III-V Materials
Jönsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2018) Swedish Microwave Days 2018
- Contribution to conference › Abstract
Mark Vertical, High-Performance 12 nm diameter InAs Nanowire MOSFETs on Si using an all III-V CMOS process
Jönsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2018) Compound Semiconductor Week 2018
- Contribution to conference › Abstract

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