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- 2011
-
Mark
Developing independence as young academics at LTH
2011)(
- Other contribution › Miscellaneous
-
Mark
Synthesis Strategies for Sub-VT Systems
2011) 20th European Conference on Circuit Theory and Design. ECCTD 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A GALS ASIC implementation from a CAL dataflow description
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Impact of switching activity on the energy minimum voltage for 65 nm Sub-VT CMOS
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Physical implementation of analog circuits assisted by conventional digital place and route methods
2011) CDNLive! EMEA, 2011(
- Contribution to conference › Other
-
Mark
Low Power and Area Efficient Implementation of a Real-Time AF Detection Algorithm in 130 nm CMOS
2011) Swedish System-on-Chip Conference, SSoCC 2011(
- Contribution to conference › Paper, not in proceeding
- 2010
-
Mark
Hardware Implementation of an Iterative Sampling Rate Converter for Wireless Communication
2010) IEEE Global Telecommunications Conference GLOBECOM 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Energy dissipation reduction of a cardiac event detector in the sub-Vt domain by architectural folding
2010) 19th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2009 5953. p.347-356(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design and Measurement of a Variable-Rate Viterbi Decoder in 130-nm Digital CMOS
(
- Contribution to journal › Article
-
Mark
Minimum-energy sub-threshold self-timed circuits: design methodology and a case study
2010) The 16th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding