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- 2021
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Mark
Graceful Degradation of Reconfigurable Scan Networks
(
- Contribution to journal › Scientific review
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Mark
Analysis and design of an 1-20 GHz track and hold circuit
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
An application specific vector processor for CNN-based massive MIMO positioning
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Reconfigurable multi-access pattern vector memory for real-time orb feature extraction
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Modular binary tree architecture for distributed large intelligent surface
2021) IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2021 In ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings 2021-June. p.4865-4869(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2020
-
Mark
Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO
(
- Contribution to journal › Article
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Mark
A 20-GHz Bandwidth Power Amplifier for Phased Array 5G New Radio Transmitters
(
- Contribution to journal › Article
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Mark
Processing distribution and architecture tradeoff for large intelligent surface implementation
2020) 2020 IEEE International Conference on Communications Workshops, ICC Workshops 2020 In 2020 IEEE International Conference on Communications Workshops, ICC Workshops 2020 - Proceedings(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
High-Speed Analog-to-Digital Converters in CMOS
2020) In Series of licentiate and doctoral dissertations(
- Thesis › Doctoral thesis (compilation)
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Mark
A 10-bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration
2020) 2020 IEEE International Symposium on Circuits and Systems (ISCAS)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding