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2024
Mark A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS
Karrari, Hamid ^LU ; Andreani, Pietro ^LU and Tan, Siyu ^LU (2024) In IEEE Access 12. p.44115-44124
- Contribution to journal › Article
2022
Mark A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
Tomasin, Lorenzo ; Andreani, Pietro ^LU ; Boi, Giovanni ; Padovan, Fabio and Bevilacqua, Andrea (2022) In IEEE Journal of Solid-State Circuits 57(9). p.2802-2811
- Contribution to journal › Article
2021
Mark Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
Jönsson, Adam ^LU (2021)
- Thesis › Doctoral thesis (compilation)
2020
Mark A Decade Frequency Range CMOS Power Amplifier for Sub-6-GHz Cellular Terminals
Lindstrand, Jonas ^LU ; Tormanen, Markus ^LU and Sjoland, Henrik ^LU (2020) In IEEE Microwave and Wireless Components Letters 30(1). p.54-57
- Contribution to journal › Article
Mark An N-Path Filter Design Methodology With Harmonic Rejection, Power Reduction, Foldback Elimination, and Spectrum Shaping
Karami, Poorya ; Banaeikashani, Amirali ; Behmanesh, Baktash ^LU and Atarodi, Seyed Mojtaba (2020) In IEEE Transactions on Circuits and Systems I: Regular Papers
- Contribution to journal › Article
2019
Mark A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS
Abdulaziz, Mohammed ^LU ; Forsberg, Therese ^LU ; Törmänen, Markus ^LU and Sjöland, Henrik ^LU (2019) In IEEE Transactions on Microwave Theory and Techniques 67(4). p.1588-1600
- Contribution to journal › Article
Mark Integrated Transmitters for Cellular User Equipment–Wideband CMOS Power Amplifiers and Antenna Impedance Tuners
Lindstrand, Jonas ^LU (2019)
- Thesis › Doctoral thesis (compilation)
2018
Mark A Self-aligned Gate-last Process applied to All-III-V CMOS on Si
Jonsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2018) In IEEE Electron Device Letters 39(7). p.935-938
- Contribution to journal › Article
Mark A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers
Ek, Staffan ; Pahlsson, Tony ; Elgaard, Christian ^LU ; Carlsson, Anders ; Axholt, Andreas ^LU ; Stenman, Anna Karin ; Sundstrom, Lars and Sjoland, Henrik ^LU (2018) In IEEE Journal of Solid-State Circuits 53(7). p.1988-2000
- Contribution to journal › Article
2017
Mark Digital Phase Locked Loops for Radio Frequency Synthesis
Mahmoud, Ahmed ^LU (2017)
- Thesis › Doctoral thesis (monograph)

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